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Moises Jezini

Research Assistant

Moises A. Jezzini is a postdoc researcher managing work packages on multiple European projects and designing novel high-speed packaging solutions. Moises holds a BSc in Physics Engineering and an MSc in Electronic systems from Tec de Monterrey; and also holds a PhD from UCC/Tyndall with a thesis titled: Microwave design of interposers for photonic integrated circuits. Moises has seven years of industrial experience working with photonics modules both as a test engineer and as a product engineer. He has managed five different products including a 40/100G PM-QPSK Rx and a 10/40G Tx.

Moises is passioned about solving problems related to both optics and high-speed electronics, and he is passionate about photonics packaging as a key element in the photonics product design. Moises is a proud husband and a father of two.